Morgan Stanley Refutes "AI Capex Peak Theory," Predicts AI Semiconductor Capex Will Continue to "Outpace" in 2028, 2.5D Packaging Capacity to Increase by Another 50%

According to Zhitong Finance APP, the Morgan Stanley Asia-Pacific Technology team recently released its latest research report, "AI Supply Chain: Prelim 2028 AI semis vs. CSP capex growth," in response to market concerns following its US Internet analyst Brian Nowak's prediction in the "Morgan Stanley AI Guidebook" that "CSP capital expenditure growth will drop to 12% by 2028." Through cross-verification with the supply chain, the core conclusion drawn is: in 2028, AI semiconductor capital expenditure, especially for compute chips, will continue to outpace overall AI capex; 2.5D advanced packaging capacity will still grow by 50%, infrastructure spending will stabilize, and memory prices will remain moderate.

This means that the AI supply chain story is not over, but is shifting from "overall capex boom" to "compute chips and advanced packaging structurally outperforming."

CSP Capex Growth Drops to 12%, but Compute Chips "Outperform"

The US Morgan Stanley team predicts that the data center capex of the four major hyperscale cloud providers will rise from about $917 billion in 2026 to about $1.47 trillion in 2027, a year-on-year growth of roughly 60%; but by 2028, growth will sharply drop to about 12%, reaching approximately $1.64 trillion.

This slowdown has prompted investors to question: does the growth engine for AI semiconductors also come to a halt?

The Asia-Pacific Technology team at Morgan Stanley gives a negative answer. Their latest supply chain checks show that although overall AI infrastructure spending is slowing, AI semiconductor capex growth—particularly in compute chips—is expected to outpace overall AI capex in 2028. The report introduces preliminary 2028 assumptions for CoWoS, CoPoS, and EMIB-T capacity, and estimates that total 2.5D packaging capacity (on average) will reach 374k wpm in 2028, about a 50% increase from 250k wpm in 2027.

The growth drivers come from two aspects: larger chip sizes and more application scenarios. These 2.5D advanced packaging technologies cover AI GPU, XPU, CPU, and network chips, and are no longer exclusive to GPUs.

Three-Pronged Progress in 2.5D Advanced Packaging: CoWoS, CoPoS, EMIB-T

Morgan Stanley breaks down the 2028 advanced packaging expansion into three main lines:

CoWoS (wafer-level): TSMC (TSM.US) continues to expand, but the oS (outsourced services) segment may require more partners. Research shows Amkor Technology (AMKR.US) and ChipMos will diversify oS production between the US and Taiwan. TSMC's CoWoS capacity is expected to increase from 130/200k wpm in 2026/2027 to 260k wpm in 2028, with the expansion mainly concentrated in Arizona's AP9/10, possibly including AP7. Non-TSMC players will grow to 110k wpm by the end of 2028: ASE/SPIL at 50—60k wpm, Amkor at 55—60k wpm, focusing on CoWoS-L and CoWoS-R.

CoPoS (panel-level): After converting to 12-inch CoWoS wafer equivalents, Morgan Stanley expects capacity to be 5—10k wpm in 2028, and will expand to 10—20k wpm in 2029. The initial target project should be NVIDIA’s (NVDA.US) Feynman Ultra GPU. TSMC is currently piloting production in Taoyuan and, if progress goes well, may build capacity at AP9/10 or AP7P3.

EMIB-T (substrate-based): Though being a substrate technology, Morgan Stanley also converts this to 12-inch CoWoS wafer equivalent capacity. A single EMIB-T substrate can produce 16 chips of 9x mask size, about 4 times the chip output of a CoWoS wafer. Morgan Stanley estimates about 40k—45k wafers of EMIB-T capacity in 2028, producing at least 2 million Humufish (9x mask) substrates, accounting for 10%—15% of the 2.5D advanced packaging market share.

Intel EMIB-T Volume Ramp, Humufish as a Key Driver

Intel (INTC.US) is an important variable in this report. Morgan Stanley observes that Intel’s current average EMIB-M capacity is 110k wpm, forecast to drop slightly to 95k wpm in 2027 as capacity is shifted to EMIB-T. The main customers for EMIB-M are Trainium3, the upcoming Trainium4, and internal server CPUs.

EMIB-T average capacity is about 5k wpm in 2026, expanding to 15—20k wpm in 2027, and reaching 40—45k wpm in 2028. Assuming each EMIB-T wafer produces 4—5 chips, Morgan Stanley maintains its view: Intel EMIB-T will still produce close to 3 million Humufish chips in 2027—2028. Although some small projects are underway, MediaTek/Google Humufish is expected to consume the majority of capacity.

ASIC Competition: Broadcom Raises Guidance, MediaTek Pursues Second Major Customer

The ASIC space is seeing dense activity.

According to analyst Joe Moore, Broadcom (AVGO.US) has stable earnings and raised its 2028 fiscal year EPS forecasts; 2027 revenue guidance now stands at $115 billion, with the possibility of doubling in 2028. CoWoS supply chain checks indicate Broadcom’s AI lab customers have booked about 15k—30k CoWoS wafers for 2027.

Morgan Stanley continues to see MediaTek’s chances of winning a second AI CSP or AI lab customer rising rapidly. Through its partnership with NVIDIA NVLink Fusion, the relevant decision may be made in Q4 2026, which will be a significant catalyst for MediaTek. Morgan Stanley gives MediaTek an "Overweight" rating.

Qualcomm (QCOM.US) announced an ASIC cooperation with AWS, a key ASIC customer for Alchip. However, the press release refers to inference; unlike Alchip’s Trainium4, which covers both training and inference. Therefore, Morgan Stanley sees limited impact on Alchip.

AMD & Microsoft: Venice Down, Maia Up

As for AMD (AMD.US), Morgan Stanley expects its CoWoS consumption to increase 165% year-on-year to 345,000 wafers in 2027. AI GPU-related production will be entirely at TSMC CoWoS, with MI455/450 as the focus for 2027, and only low volume production for the MI500 series (Arcadia) at the end of 2027. MI455 and MI450 output could reach around 500,000—650,000 units each. TSMC CoWoS-L bookings are expected to grow 200% year-on-year, reaching 210,000 wafers.

But the non-TSMC camp is ramping slower than expected. AMD Venice CPU CoWoS bookings will rise from 50,000 in 2026 to 210,000 in 2027, but this is below initial forecasts, and production estimates have been revised from 5.6 million to 4.4 million units. TSMC will also need to support about 80,000 CoWoS-L wafers for Venice, partially squeezing out AI GPU build capacity.

For Microsoft (MSFT.US), demand for the Maia200 has been revised upwards. Morgan Stanley has tracked positive 2027 revision demand for Maia200, and expects 2027 demand for about 5,000 CoWoS units, indicating booking of about 100,000—150,000 chips.

HBM & Wafer Consumption: Demand Boom in 2027

Morgan Stanley forecasts that total AI HBM demand will reach approx. 44.9 billion GB in 2027, up from 29 billion GB in 2026. NVIDIA's Rubin series and Google TPU v8i/v9 are the main drivers.

For wafer consumption, total AI wafer consumption is projected to reach at least $55 billion in 2027, compared to $27 billion in 2026. TSMC’s AI-related revenue CAGR for 2024—2029 may hit 60%. Morgan Stanley still expects AI chip revenue to grow quarter-on-quarter.

Global CoWoS demand is also expanding rapidly. Morgan Stanley predicts overall demand will rise from 1.394 million wafers in 2026 to 2.509 million in 2027, up 80% year-on-year. NVIDIA's consumption increases from 780,000 to 1.222 million wafers, Broadcom from 300,000 to 484,000, AMD from 130,000 to 345,000, MediaTek from 40,000 to 180,000, and Marvell Technology (MRVL.US) from 26,000 to 90,000 wafers.

From "Racing for GPUs" to "Competing on Efficiency": AI Investment Enters the ROIC Test

The US Morgan Stanley team previously noted in its report that AI investment is not a capital black hole. Model companies providing API services with their own computing power can achieve an ROIC as high as 46%; companies relying on third-party infrastructure have a return of about 25%; IaaS mode ROIC is about 31%. The most attractive segment is not pure compute leasing, but companies possessing model development, infrastructure, and commercialization capabilities.

Meanwhile, Morgan Stanley expects the cumulative operating cash flow of the four cloud giants to rise from $739 billion in 2026 to $1.23 trillion in 2028, while additional debt financing needs will drop from $238 billion to $90 billion. By 2028, the incremental debt need for these giants will only be about 7% of operating cash flow, so financing pressure does not worsen in lockstep with capex.

However, after a capex spree, 2028 may enter a “digesting phase.” Real-world constraints such as chips, racks, land, electricity, and labor are limiting further expansion; hyperscalers have “pre-built” significant data center capacity for 2027—2029, so there is limited room to further accelerate capex. The market focus will shift from “who can build more data centers” to “who can turn built compute power into actual revenue and profits.”

Morgan Stanley believes that as capex growth slows and AI application penetration rises, capital could gradually cycle from hardware, semiconductors, and memory to models, cloud platforms, and software applications. AI investment's "ROIC test" is shifting from the compute buildout stage to the commercialization stage. Whether the application layer can continue to contribute revenue and profit will become the key valuation driver in the next phase.